Introducing Virtuoso RF Designer (RFD) For RFIC Designs
نویسنده
چکیده
It is essential to accurately predict parasitics and the numerous high frequency effects while designing RF integrated circuits (RFICs). A traditional RFIC design flow involves schematic design and simulation, followed by layout, then by post-layout verification and extraction. However, this traditional flow usually leads to multiple iterations between schematic and layout designs and ends up with inaccurate prediction of circuit performance and ultimately to longer time to market.
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تاریخ انتشار 2008